23#if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
27#define HWCAP_AARCH64_AES (1 << 3)
28#define HWCAP_AARCH64_PMULL (1 << 4)
29#define HWCAP_AARCH64_CRC32 (1 << 7)
30#define HWCAP_AARCH64_SHA3 (1 << 17)
31#define HWCAP_AARCH64_ASIMDDP (1 << 20)
32#define HWCAP_AARCH64_SVE (1 << 22)
33#define HWCAP2_AARCH64_SVE2 (1 << 1)
34#define HWCAP2_AARCH64_I8MM (1 << 13)
35#define HWCAP2_AARCH64_SME (1 << 23)
36#define HWCAP2_AARCH64_SME_I16I64 (1 << 24)
37#define HWCAP2_AARCH64_SME2 (1ULL << 37)
46 if (hwcap & HWCAP_AARCH64_AES)
48 if (hwcap & HWCAP_AARCH64_PMULL)
50 if (hwcap & HWCAP_AARCH64_SHA3)
52 if (hwcap & HWCAP_AARCH64_CRC32)
54 if (hwcap & HWCAP_AARCH64_ASIMDDP)
56 if (hwcap & HWCAP_AARCH64_SVE)
58 if (hwcap2 & HWCAP2_AARCH64_SVE2)
60 if (hwcap2 & HWCAP2_AARCH64_I8MM)
62 if (hwcap2 & HWCAP2_AARCH64_SME)
64 if (hwcap2 & HWCAP2_AARCH64_SME_I16I64)
66 if (hwcap2 & HWCAP2_AARCH64_SME2)
72#elif defined(__APPLE__) && HAVE_SYSCTLBYNAME
73#include <sys/sysctl.h>
75static int have_feature(
const char *feature) {
87 if (have_feature(
"hw.optional.arm.FEAT_DotProd"))
89 if (have_feature(
"hw.optional.arm.FEAT_I8MM"))
91 if (have_feature(
"hw.optional.arm.FEAT_SME"))
93 if (have_feature(
"hw.optional.arm.FEAT_SME_I16I64"))
95 if (have_feature(
"hw.optional.armv8_crc32"))
97 if (have_feature(
"hw.optional.arm.FEAT_AES"))
99 if (have_feature(
"hw.optional.arm.FEAT_PMULL"))
101 if (have_feature(
"hw.optional.armv8_2_sha3"))
103 if (have_feature(
"hw.optional.arm.FEAT_SME2"))
109#elif defined(__OpenBSD__)
110#include <machine/armreg.h>
111#include <machine/cpu.h>
112#include <sys/types.h>
113#include <sys/sysctl.h>
119#ifdef CPU_ID_AA64ISAR0
125 mib[0] = CTL_MACHDEP;
126 mib[1] = CPU_ID_AA64ISAR0;
128 if (sysctl(mib, 2, &isar0, &
len,
NULL, 0) != -1) {
129 if (ID_AA64ISAR0_DP(isar0) >= ID_AA64ISAR0_DP_IMPL)
131 if (ID_AA64ISAR0_CRC32(isar0) >= ID_AA64ISAR0_CRC32_BASE)
133 if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_BASE)
135 if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_PMULL)
137 if (ID_AA64ISAR0_SHA3(isar0) >= ID_AA64ISAR0_SHA3_IMPL)
141 mib[0] = CTL_MACHDEP;
142 mib[1] = CPU_ID_AA64ISAR1;
144 if (sysctl(mib, 2, &isar1, &
len,
NULL, 0) != -1) {
145#ifdef ID_AA64ISAR1_I8MM_IMPL
146 if (ID_AA64ISAR1_I8MM(isar1) >= ID_AA64ISAR1_I8MM_IMPL)
161#ifdef PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE
162 if (IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE))
165#ifdef PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE
166 if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE)) {
171#ifdef PF_ARM_SHA3_INSTRUCTIONS_AVAILABLE
172 if (IsProcessorFeaturePresent(PF_ARM_SHA3_INSTRUCTIONS_AVAILABLE))
175#ifdef PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE
176 if (IsProcessorFeaturePresent(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE))
179#ifdef PF_ARM_V82_I8MM_INSTRUCTIONS_AVAILABLE
180 if (IsProcessorFeaturePresent(PF_ARM_V82_I8MM_INSTRUCTIONS_AVAILABLE))
183#ifdef PF_ARM_SVE_INSTRUCTIONS_AVAILABLE
184 if (IsProcessorFeaturePresent(PF_ARM_SVE_INSTRUCTIONS_AVAILABLE))
187#ifdef PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE
188 if (IsProcessorFeaturePresent(PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE))
191#ifdef PF_ARM_SME_INSTRUCTIONS_AVAILABLE
192 if (IsProcessorFeaturePresent(PF_ARM_SME_INSTRUCTIONS_AVAILABLE))
195#ifdef PF_ARM_SME_I16I64_INSTRUCTIONS_AVAILABLE
196 if (IsProcessorFeaturePresent(PF_ARM_SME_I16I64_INSTRUCTIONS_AVAILABLE))
199#ifdef PF_ARM_SME2_INSTRUCTIONS_AVAILABLE
200 if (IsProcessorFeaturePresent(PF_ARM_SME2_INSTRUCTIONS_AVAILABLE))
219#ifdef __ARM_FEATURE_DOTPROD
222#ifdef __ARM_FEATURE_MATMUL_INT8
225#ifdef __ARM_FEATURE_SVE
228#ifdef __ARM_FEATURE_SVE2
231#ifdef __ARM_FEATURE_SME
234#ifdef __ARM_FEATURE_CRC32
237#ifdef __ARM_FEATURE_AES
241#ifdef __ARM_FEATURE_SHA3
244#ifdef __ARM_FEATURE_SME_I16I64
247#ifdef __ARM_FEATURE_SME2
#define flags(name, subs,...)
int ff_get_cpu_flags_aarch64(void)
size_t ff_get_cpu_max_align_aarch64(void)
static int detect_flags(void)
unsigned long ff_getauxval(unsigned long type)
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
#define AV_CPU_FLAG_DOTPROD
#define AV_CPU_FLAG_ARM_AES
#define AV_CPU_FLAG_SME_I16I64
#define AV_CPU_FLAG_ARM_CRC
#define AV_CPU_FLAG_ARMV8
#define AV_CPU_FLAG_PMULL